IBM AMD Quantum Error Correction Platform Explained

IBM, the U.S. Department of Energy-funded Quantum Science Center at Oak Ridge National Laboratory, and AMD have unveiled a co-design platform that places quantum hardware beside high-performance classical computing. The first deployment pairs IBM quantum systems, including a 120-qubit Nighthawk processor, with Oak Ridge’s Umbra system, which uses AMD Instinct MI355X GPUs and fifth-generation AMD EPYC CPUs.

The goal is not to sell a finished fault-tolerant quantum computer. It is to give researchers a tightly integrated environment for testing how quantum error correction behaves when decoding, orchestration and hardware control can draw on substantial classical compute. That distinction matters because correcting errors on a useful quantum system is not a quantum-only problem: the machine must repeatedly measure clues about errors, interpret those measurements and decide what to do next.

IBM connects the work to a late-2028 milestone of 100 logical qubits and 100,000 hard operations. Its announcement says current experiments have reached as many as 70 logical qubits and 438 hard operations, leaving a roughly 230-fold gap in hard-operation count. The new platform is designed to study the architectures, codes and workflows needed to close that gap—not to claim that it has already been closed.

The announcement at a glance

Participants: IBM, the Oak Ridge-led Quantum Science Center and AMD.
Quantum side: IBM systems including a 120-qubit IBM Quantum Nighthawk processor with square-lattice connectivity and real-time pulse control.
Classical side: Oak Ridge’s Umbra HPC system, powered by AMD Instinct MI355X accelerators and fifth-generation AMD EPYC processors.
Primary job: research into error-correction codes, decoder optimization, hardware-aware compilation and software orchestration.
2028 checkpoint in IBM’s announcement: 100 logical qubits performing 100,000 hard operations.
What is not disclosed: the quantity of Umbra CPU or GPU nodes assigned to the platform, measured quantum-to-classical latency, benchmark results, external-access terms or a public deployment date.

How the quantum and classical systems work together

A physical qubit is fragile. Heat, electromagnetic interference, imperfect gates and measurement errors can all disturb the state used in a calculation. Error correction tries to protect useful information by encoding one logical qubit across multiple physical qubits and repeatedly checking for patterns—often called syndromes—that indicate what went wrong.

The quantum processor generates those measurements, but a classical system must interpret them. A decoder estimates the most likely error pattern and helps determine how the computation should proceed. At larger code sizes and higher circuit rates, that task can become both computationally heavy and latency-sensitive. If the classical side takes too long, the quantum state may continue to degrade while the system waits.

Co-locating Nighthawk-class quantum hardware with Umbra lets the teams study the whole feedback loop: quantum measurements, data movement, GPU-accelerated decoding, control decisions and the timing of the next operation. IBM says the environment will let researchers compare the qubit, time, sample and classical-resource cost of different methods, helping identify where accelerators are useful and where communication or software overhead dominates.

The hardware stack

IBM Quantum Nighthawk

The deployment includes a 120-qubit Nighthawk processor. IBM’s current Nighthawk r2 design combines those programmable qubits with 218 couplers and 120 independent reset elements. IBM says the reset architecture can execute more than 100,000 circuits per second, up to 25 times the throughput of its Heron systems, and that mid-circuit reset is especially useful for error-correction experiments that reuse auxiliary qubits.

Nighthawk’s square lattice gives most qubits four nearest neighbors, increasing the connectivity available for code layouts and circuit design. The Oak Ridge announcement also emphasizes precise pulse timing, mid-calculation measurement, real-time action and access to raw measurement signals through IBM’s Quantum System API. Those are research controls, not merely a cloud job queue, and they are important when teams need to inspect what the hardware actually did.

Oak Ridge Umbra and AMD compute

Umbra supplies the classical foundation. IBM identifies AMD Instinct MI355X GPUs and fifth-generation EPYC CPUs, but it does not publish the node count, memory capacity, network topology or the portion of Umbra reserved for this work. That means the announcement establishes the component families, not a complete system specification.

GPUs are attractive for decoding because many candidate algorithms involve large numbers of similar operations that can run in parallel. CPUs remain useful for orchestration, control flow and software services around the decoder. The value of the platform will depend on how efficiently the teams divide those jobs and how quickly data can move between quantum control equipment and the classical system.

What researchers will test

IBM lists several classes of work rather than a single preferred code or decoder. That is the point of a co-design platform: compare alternatives under realistic hardware and timing constraints before locking a future architecture into one approach.

Concatenated codes: layer one error-correcting code inside another to improve protection, while increasing physical-qubit and decoding demands.
Space-time codes: use patterns across qubits and repeated measurement rounds, making reset quality and low-latency classical processing especially relevant.
Algorithm-aware decoders: use knowledge about the workload instead of treating every circuit as interchangeable.
Hardware-aware optimization and compilation: map code operations to the processor’s real connectivity, timing and error characteristics.
Software orchestration: coordinate quantum jobs, classical acceleration, data movement and control feedback as one workflow.

The teams also plan to connect the platform with the Oak Ridge Leadership Computing Facility. IBM describes that as a pathway for exploring quantum computing inside a broader AI and scientific-computing infrastructure. The announcement does not say when that connection will be completed or which outside researchers will be able to use it.

What the 2028 goal means—and where the sources differ

A logical qubit is protected information encoded across multiple physical qubits. A hard operation is an operation executed on that protected layer under demanding conditions. The 100-logical-qubit and 100,000-hard-operation checkpoint in IBM’s November 5 announcement is therefore more informative than a raw physical-qubit count: it asks whether protected information can survive a meaningful sequence of operations.

IBM says its experiments have reached up to 70 logical qubits and 438 hard operations. Dividing 100,000 by 438 gives about 228, which explains the company’s rounded 230-fold hard-operation gap. Logical-qubit count is closer to the checkpoint than operation depth, so endurance and reliable repeated correction are the bigger disclosed shortfall.

Readers should not treat that checkpoint as the entire Department of Energy competition specification. DOE’s September 17 Quantum Genesis Q Competition announcement describes a broader requirement: systems with at least 100 logical qubits capable of hundreds of millions of fault-tolerant operations, plus scientific demonstrations. It also describes a separate national-laboratory validation and verification testbed call. IBM’s release presents the 100,000-hard-operation figure as a late-2028 mission target; DOE’s public competition notice sets a higher ultimate capability bar.

Why co-location could matter

Cloud access is useful for running circuits, but error correction can require a much tighter loop than ordinary batch submission. Measurements made during a circuit may need to influence later operations in that same circuit. Every additional software layer, network hop or queue can complicate latency, timing guarantees and debugging.

Putting the quantum and classical systems in one research environment does not automatically solve those issues, but it makes them measurable. Teams can profile where time is spent, compare CPU and GPU decoder implementations, test how codes respond to real device noise and decide which tasks must remain near the hardware. Those results could shape future control electronics, networking and open software as much as the quantum processor itself.

What this announcement does not prove

No fault-tolerant system yet: the platform is a research environment intended to accelerate error-correction work, not a completed scientifically relevant quantum computer.
No published performance benchmark: IBM provides component families and research objectives, but not decoder throughput, end-to-end latency, logical error rates or workload results from the combined platform.
No access schedule: the announcement does not state when external researchers can apply for time, what access will cost or which software interfaces will be public.
No complete Umbra configuration: GPU and CPU models are named, but quantities, memory, networking and allocation details are absent.
No guaranteed Starling outcome: IBM says lessons may inform its path to the planned Starling fault-tolerant system; that is a research connection, not a launch commitment created by this deployment.

Why AMD is involved

AMD’s role is broader than supplying accelerators. The companies have already explored AMD GPUs for a classical diagonalization stage in sample-based quantum diagonalization and previously demonstrated quantum-error decoding on AMD chips. The new platform extends that collaboration toward the full control-and-decoding workflow.

For AMD, this is also a systems opportunity. Future quantum computers will still need CPUs, accelerators, networking and large conventional supercomputers. If the classical workload around error correction grows as expected, the architecture and software that support it could become a substantial part of the quantum-computing stack even before fault-tolerant machines are broadly useful.

A useful primer for curious readers

Readers who want the fundamentals before diving into error-correction research can consider Quantum Computing for Everyone by Chris Bernhardt (paperback, ISBN-10/ASIN 0262539535). MIT Press describes it as an accessible introduction for readers comfortable with high-school mathematics. Check the seller, edition and format before ordering.

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Bottom line

The most important part of the IBM, AMD and Oak Ridge announcement is the architecture of the research effort. Quantum error correction will not scale through quantum hardware alone; it also needs fast classical decoding, precise control, suitable networking and software that can coordinate the full loop. Pairing Nighthawk with Umbra gives the teams a place to test those dependencies together.

The published numbers also keep expectations grounded. Seventy logical qubits and 438 hard operations are meaningful experiments, but they remain far from the 100,000-hard-operation checkpoint IBM cites for late 2028—and farther from the broader operation scale described in DOE’s competition notice. The platform is best understood as infrastructure for measuring and reducing that gap, not evidence that practical fault-tolerant quantum computing has arrived.